1. Field of the Invention
The present invention relates to an IC element layout data display system for displaying IC element layout data, i.e., data on the layout of the elements of a large-scale integrated circuit (IC), and, more particularly, to an IC element layout data display system capable of displaying data on IC element layout in an enlarged or a reduced image to facilitate the visual examination and analysis of graphic information.
2. Description of the Related Art
Recent trend toward the functional advancement and dimensional reduction of electronic equipment requires further functional improvement and increase in the level of integration of various ICs represented by ASICs.
ICs, such as ASICs, are fabricated through many processes of fabricating semiconductor devices including a process of designing functions, logic, circuits and element layout, a process of producing graphic data for forming photomasks on the basis of the graphic data, processes of transferring the patterns of the photomasks to a wafer by a reduction projection exposure method or the like, and processes of forming semiconductor elements on the wafer.
Generally, the IC industry uses a stream format as a file format for IC element layout data in an IC designing process and a photomask forming process.
Data of the stream format is displayed on the screen of a display and is enlarged or reduced to examine the layout of the elements of an IC and to analyze defects in the IC.
When displaying the data of a stream format on the screen of a display, graphic information displayed in a display area is retrieved sequentially from the head to the tail of a file, and desired graphic information is displayed after retrieval all the data.
When enlarging or reducing an optional display area, desired graphic information is displayed after retrieval from the head to tail of the data.
When thus displaying graphic information about the layout of the elements of an IC, all the large-scale data is retrieved every time the display area is enlarged or reduced. However, the scale of data on the layout of the elements of LSI has been progressively increased and time necessary for displaying desired graphic information has been increased in proportion to the increase of the file size.
As the scale of the data on the layout of the elements of an IC increases progressively, time necessary for displaying graphic information about the lay out of the elements of an IC every time the display area is enlarged or reduced has increased beyond a practically tolerable limit, and the development of measures to reduce time necessary for displaying graphic information has been desired.
The present invention has been made in view of such problems and it is therefore an object of the present invention to provide an IC element layout data displaying system capable of displaying graphic information about IC element layout data of a large file size or displaying an enlarged or reduced display area in a short time regardless of file size.
According to the present invention, an IC element layout data displaying system includes an information recording unit for recording IC element layout data including a plurality of pieces of graphic information; a preprocessor capable of dividing the IC element layout data into a plurality of pattern sets each having an optional number of successive pieces of graphic information on the basis of the IC element layout data retrieved from the information recording unit so as to obtain map information including the plurality of pattern sets and position information corresponding to respective positions of pattern sets; an input unit for specifying an optional display area on the IC element layout data; a pattern retrieving unit capable of comparing the map information provided by the preprocessor and a display area specified by the input device and of specifying graphic information corresponding to the display area from the IC element layout data stored in the information recording unit; and a display unit for displaying the graphic information specified by the pattern retrieving unit.
In the IC element layout data displaying system according to the present invention, the preprocessor obtains map information having area information representing rectangular areas respectively including pattern sets.
In the IC element layout data displaying system according to the present invention, the preprocessor includes: a pattern set forming means for forming set information including a plurality of pattern sets each of an optional number of successive pieces of graphic information obtained by dividing the IC element layout data into a plurality of pattern sets, a pattern set area calculating means for obtaining area information representing rectangular areas respectively corresponding to the pattern sets, an in-file position finding means for obtaining position information representing position of each pattern set on the IC element layout data, and a map information generating means for generating map information on the basis of the set information provided by the pattern set forming means, the area information provided by the pattern set area calculating means, and the position information provided by the position finding means.
In the IC element layout data displaying system according to the present invention, the pattern retrieving unit includes a pattern retrieval range obtaining means for obtaining a pattern set corresponding to a display area by comparing the map information provided by the preprocessor and a display area specified by the input device, and obtaining retrieval range information including position information corresponding to a position of the pattern set, and a pattern retrieving means for retrieving graphic information corresponding to the display area from the IC element layout data by accessing the information recording unit on the basis of the retrieval range information provided by the pattern retrieval range obtaining means.
In the IC element layout data displaying system according to the present invention, the information recording unit is a magnetic disk unit.
In the IC element layout data displaying system according to the present invention, the information recording unit is capable of storing large-scale IC element layout data.
In the IC element layout data displaying system according to the present invention, the large-scale IC element layout data stored in the information recording unit includes the IC element layout data including more than several million transistors, and has a file size on the order of gigabytes.
In the IC element layout data displaying system according to the present invention, the pattern retrieving unit includes a pattern retrieval range obtaining means for obtaining a pattern set corresponding to a display area by comparing area information provided by the pattern set area calculating means of the preprocessor and display area specified by the input unit, and obtaining retrieval range information including position information corresponding to a position of the pattern set, and a pattern retrieving means for obtaining graphic data corresponding to the display area from the IC element layout data by accessing the information recording unit on the basis of the retrieval range information provided by the pattern retrieval range obtaining means.
The IC element layout data displaying system according to the present invention is capable of displaying graphic information about IC element layout data of a large file size or displaying an enlarged or reduced display area in a practically tolerable time regardless of file size.
The IC element layout data displaying system according to the present invention retrieves data on a specified display area from the IC element layout data and displays the same in a short time. Since map information on pattern sets is prepared beforehand by the preprocessor, the graphic data at a specific position in the IC element layout data can be retrieved on the basis of the map information and the retrieved graphic data is displayed. Since all the data does not need to be browsed, the data can be displayed in a practically tolerable predetermined time regardless of the size of the data.
The present invention is particularly effective when the scale of the IC element layout data is very large.